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NXP Semiconductors
PCA9633
4-bit Fm+ I 2 C-bus LED driver
When DMBLNK bit is programmed with 1, GRPPWM and GRPFREQ registers de?ne a
global blinking pattern, where GRPFREQ contains the blinking period (from 24 Hz to
10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
GDC [ 7 : 0 ]
duty cycle = ---------------------------
256
7.3.5 Group frequency, GRPFREQ
Table 12. GRPFREQ - Group Frequency register (address 07h) bit description
Legend: * default value.
(2)
Address
07h
Register
GRPFREQ
Bit
7:0
Symbol
GFRQ[7:0]
Access
R/W
Value
0000 0000*
Description
GRPFREQ register
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2
register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT register).
Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz)
to FFh (10.73 s).
global blinking period = ---------------------------------------- ( in sec onds )
GFRQ [ 7 : 0 ] + 1
24
7.3.6 LED driver output state, LEDOUT
Table 13. LEDOUT - LED driver output state register (address 08h) bit description
Legend: * default value.
(3)
Address
08h
Register
LEDOUT
Bit
7:6
5:4
3:2
1:0
Symbol
LDR3
LDR2
LDR1
LDR0
Access
R/W
R/W
R/W
R/W
Value
00*
00*
00*
00*
Description
LED3 output state control
LED2 output state control
LED1 output state control
LED0 output state control
LDRx = 00 — LED driver x is off (default power-up state).
LDRx = 01 — LED driver x is fully on (individual brightness and group dimming/blinking
not controlled).
LDRx = 10 — LED driver x individual brightness can be controlled through its PWMx
register.
LDRx = 11 — LED driver x individual brightness and group dimming/blinking can be
controlled through its PWMx register and the GRPPWM registers.
PCA9633_5
? NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 25 July 2008
14 of 43
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